S
Swapnajit Mittra
Guest
Project VeriPage has added two new articles on
SystemVerilog in a series on SystemVerilog
datatypes.
The first one is on SystemVerilog structure
and union types and how to use them in your
design.
The second one is the Part-1 of an article on
SystemVerilog Classes starting with basic
definitions and 'how-to' examples.
Go to Project VeriPage website and click on
the link under 'What's New'.
<URL: http://www.project-veripage.com>
Note that, Project VeriPage has a new webaddress
now. If you have a bookmark to the old address,
please update it now as that will soon be
retired.
For getting update news automaticlly, subscribe
to 'Project VeriPage Updates' mailing list:
<URL: http://www.project-veripage.com/list/?p=subscribe&id=1>
SystemVerilog in a series on SystemVerilog
datatypes.
The first one is on SystemVerilog structure
and union types and how to use them in your
design.
The second one is the Part-1 of an article on
SystemVerilog Classes starting with basic
definitions and 'how-to' examples.
Go to Project VeriPage website and click on
the link under 'What's New'.
<URL: http://www.project-veripage.com>
Note that, Project VeriPage has a new webaddress
now. If you have a bookmark to the old address,
please update it now as that will soon be
retired.
For getting update news automaticlly, subscribe
to 'Project VeriPage Updates' mailing list:
<URL: http://www.project-veripage.com/list/?p=subscribe&id=1>