And gate from Ex-or?

R

rsk

Guest
Dear Friends,

How to implement a two input and gate from a two input exor gate or
gates?


Thanks & Regards,
krs...
 
On Thu, 21 Jul 2005 08:15:18 -0400, "rsk" <krs_1980@yahoo.co.in>
wrote:

Dear Friends,

How to implement a two input and gate from a two input exor gate or
gates?
Dismantle the XOR gate. You will find that it is made of
four two-input NAND gates. Three of these gates should be
wired as inverters by tying one of their inputs to logic '1'.
You can then wire these three inverters in a string, giving
a single invert operation that can be used to change the
NAND function into an AND function.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail:jonathan.bromley@doulos.com
Fax: +44 (0)1425 471573 Web: http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
Hi Jona,
Thanks for your idea.But which three Nand gates you want me to connect
to Logic "1".

Will you explain it clearly.

Thanks & Regards,
KRS...
 
On Thu, 21 Jul 2005 10:03:12 -0400, "rsk"
<krs_1980@yahoo.co.in> wrote:

Thanks for your idea.But which three Nand
gates you want me to connect to Logic "1".
Will you explain it clearly.
I have a very wonderful proof that what you ask
is impossible. Unfortunately, the margin of this
message is too small to accommodate it.

HINT: The truth table for AND has an odd number of
1 bits in it, but the truth table for XOR has an
even number of 1 bits in it.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail:jonathan.bromley@doulos.com
Fax: +44 (0)1425 471573 Web: http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
Hi Jonathan,

Actually i got one solution with your idea.
And i will explain what it is.As we know that EX-or gate consists of 4
NAND gates.

1)The output of 1st NAND gate is "AB whole bar".

2)Now take this ("AB whole bar") as one of the inputs to the second and
third NAND gates and connect the other input of these two gates to
"logic1" then the output of these two gates is
"AB".

3)Finally the output from the 2nd and 3rd NAND gates(i.e AB) will go to
the 4th NAND gate to give the output as "AB whole bar".

Now take this output (i.e "AB whole bar" ) and repeat the steps from
1,2,3 with another EX-or gate (i.e with another 4 NAND gates).

Finally we will get the "AB" as output at the 4th NAND gate.

Thats how i got the solution Mr.Jonathan.But the Idea is yours only i.e
"Dismantleing the EX-or gate".

Thanks & Regards,
krs...
 
Jonathan Bromley wrote:
On Thu, 21 Jul 2005 10:03:12 -0400, "rsk"
krs_1980@yahoo.co.in> wrote:

Thanks for your idea.But which three Nand
gates you want me to connect to Logic "1".
Will you explain it clearly.

I have a very wonderful proof that what you ask
is impossible. Unfortunately, the margin of this
message is too small to accommodate it.
You're a funny man, Mr. Fermat.

-a
 

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