N
Niv
Guest
I've downloaded the am29dl322d (and others in the am29 series) and
tried to simulate with them.
There seems to be a lot of problems with this (these) model(s).
Initially, the model wouldn't compile due to some incompatibility with
the ieee.vital_timing library, requiring 2 lines to be commented out in
the two output path generate statements at the end of the model. It
then compiled OK (thanks to Mentor). However, when I try to simulate,
I get an error immediately saying:
# ** Fatal: (vsim-3421) Value 11 is out of range 1 to 4.
# Time: 0 fs Iteration: 0 Process:
/fmc_tb/u_0/u_3/behavior/functional File:
J:/POOL/ELEC_DES/Meteor/FPGA_DESIGN/LOFR/VERIFICATION/SIMULATION/MODELS/MDL_05_FLASH/RTL_HDL/am29dl324d.vhd
# Fatal error at
J:/POOL/ELEC_DES/Meteor/FPGA_DESIGN/LOFR/VERIFICATION/SIMULATION/MODELS/MDL_05_FLASH/RTL_HDL/am29dl324d.vhd
line 2683
So, are these models really that bad or am I doing something wrong?
This is now holding uo my progress in designing an FPGA interface to
these FLASH device(s).
Regards, Kev P.
tried to simulate with them.
There seems to be a lot of problems with this (these) model(s).
Initially, the model wouldn't compile due to some incompatibility with
the ieee.vital_timing library, requiring 2 lines to be commented out in
the two output path generate statements at the end of the model. It
then compiled OK (thanks to Mentor). However, when I try to simulate,
I get an error immediately saying:
# ** Fatal: (vsim-3421) Value 11 is out of range 1 to 4.
# Time: 0 fs Iteration: 0 Process:
/fmc_tb/u_0/u_3/behavior/functional File:
J:/POOL/ELEC_DES/Meteor/FPGA_DESIGN/LOFR/VERIFICATION/SIMULATION/MODELS/MDL_05_FLASH/RTL_HDL/am29dl324d.vhd
# Fatal error at
J:/POOL/ELEC_DES/Meteor/FPGA_DESIGN/LOFR/VERIFICATION/SIMULATION/MODELS/MDL_05_FLASH/RTL_HDL/am29dl324d.vhd
line 2683
So, are these models really that bad or am I doing something wrong?
This is now holding uo my progress in designing an FPGA interface to
these FLASH device(s).
Regards, Kev P.