altera, xilinx susceptible to power transients?

[Jeff]

Just wondering...how susceptible are these RAM based FPGA devices to power
supply transients, brownouts, etc? I am looking on Altera's website and
have not found much yet.

Thanks,

Jeff

 

[Austin Lesea]

Jeff,

If the transient is long enough, and large enough to upset a
configuration latch, the power on reset circuit will see it first, and
reset the device, cleaning it out, and preparing for a new configuration
load.

Since we have been doing FPGAs for 20 years now, that is one basic we
had to get right a long long time ago.....

The latches themselves maintain their storage down to ~ 300 mV, so
anything that dips that low, trips the reset.

Austin

Jeff wrote:

Just wondering...how susceptible are these RAM based FPGA devices to power
supply transients, brownouts, etc? I am looking on Altera's website and
have not found much yet.

Thanks,

Jeff

 

[Ray Andraka]

It'll do a full reset long before it corrupts individual cells. The voltage
range is pretty wide, so this really should not be a concern with a proper
power supply.

Jeff wrote:

Just wondering...how susceptible are these RAM based FPGA devices to power
supply transients, brownouts, etc? I am looking on Altera's website and
have not found much yet.

Thanks,

Jeff

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759

 

[Naveed]

"Jeff" <koebrich@sbcglobal.net> wrote in message news:<pijZb.11786$PY.278@newssvr26.news.prodigy.com>...

Just wondering...how susceptible are these RAM based FPGA devices to power
supply transients, brownouts, etc? I am looking on Altera's website and
have not found much yet.

Thanks,

Jeff

I have been using 1.5V cyclone. Cyclone will reset some of its FF for
a very fast transient on 1.5V rails. I am taling about voltage
dipping well below 1V for more than 5-10nsec multiple times. I have
never seen it going into the reconfiguration.

If transient is the problem, avoid using low voltage ICs, go for 2.5V
or even 3.3V cores.

Naveed

 

[Ray Andraka]

5-10ns is a very narrow spike on the power, which should be caught mostly by your power supply bypassing.
It is quite possible you have insufficient power supply bypassing on your board which is causing upsets or
false clock transitions due to the narrow transients. Try it with much slower changes in the supply
voltage, you'll see then that the chip continues to operate (although it slows down) as power is reduced
until the reconfiguration reset trips.


Naveed wrote:

"Jeff" <koebrich@sbcglobal.net> wrote in message news:<pijZb.11786$PY.278@newssvr26.news.prodigy.com>...
Just wondering...how susceptible are these RAM based FPGA devices to power
supply transients, brownouts, etc? I am looking on Altera's website and
have not found much yet.

Thanks,

Jeff

I have been using 1.5V cyclone. Cyclone will reset some of its FF for
a very fast transient on 1.5V rails. I am taling about voltage
dipping well below 1V for more than 5-10nsec multiple times. I have
never seen it going into the reconfiguration.

If transient is the problem, avoid using low voltage ICs, go for 2.5V
or even 3.3V cores.

Naveed

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759

 

[Naveed]

Andraka,

There is no amount of capacitors that will save me from the
transients. My FPGA 1.5V supply share the same ground as programmable
0-800V power supply (different planes but connected). So if some body
touches the 800V power supply with a probe for measurement, it creates
spikes all over. You can reduce them, but not completely eliminate
them.

If I did not have ceramics (in decades) all over, then these spikes
would have been 2-3V at the FPGA, but they are about 1V now.

We don't mind these transients, as these boards will not be probed in
actual use.

But if that was not the case, then I would have done one of the
followings:
1. Isolate the digital and power supplies (expensive option)
2. Use a 5 or 3.3V core logic, and use expensive filtering scheme for
Core supply (including inductors)

Thanks,

Naveed


Ray Andraka <ray@andraka.com> wrote in message

5-10ns is a very narrow spike on the power, which should be caught mostly by your power supply bypassing.
It is quite possible you have insufficient power supply bypassing on your board which is causing upsets or
false clock transitions due to the narrow transients. Try it with much slower changes in the supply
voltage, you'll see then that the chip continues to operate (although it slows down) as power is reduced
until the reconfiguration reset trips.

 

[Ray Andraka]

My point is that the narrow transients you are seeing are not something normally seen on a properly designed
circuit board. They are not sufficient to trip the reconfiguration but are sufficient to mess up state in the
FPGA. Question: are you seeing the FPGA lose part of its configuration, or are you just seeing upset of the
user circuit state (in which case a reset of the logic without reconfiguring would fix it)? Good chance it is
the latter, not the former based on your description of the crummy power rails. If you are concerned about this
(sounds like perhaps you are not), then better isolation from that 800v supply is the only answer.

Naveed wrote:

Andraka,

There is no amount of capacitors that will save me from the
transients. My FPGA 1.5V supply share the same ground as programmable
0-800V power supply (different planes but connected). So if some body
touches the 800V power supply with a probe for measurement, it creates
spikes all over. You can reduce them, but not completely eliminate
them.

If I did not have ceramics (in decades) all over, then these spikes
would have been 2-3V at the FPGA, but they are about 1V now.

We don't mind these transients, as these boards will not be probed in
actual use.

But if that was not the case, then I would have done one of the
followings:
1. Isolate the digital and power supplies (expensive option)
2. Use a 5 or 3.3V core logic, and use expensive filtering scheme for
Core supply (including inductors)

Thanks,

Naveed

Ray Andraka <ray@andraka.com> wrote in message
5-10ns is a very narrow spike on the power, which should be caught mostly by your power supply bypassing.
It is quite possible you have insufficient power supply bypassing on your board which is causing upsets or
false clock transitions due to the narrow transients. Try it with much slower changes in the supply
voltage, you'll see then that the chip continues to operate (although it slows down) as power is reduced
until the reconfiguration reset trips.

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759