M
Manfred Balik
Guest
I'm using an Altera ACEX1K and can't find the condition of the IO-Pins
during configuration and initialisation of the FPGA ???
Can there be an input on the IO-Pins during configuration and initialisation
???
Especially can there be a clock on GCLK0-Pin during configuration and
initialisation ???
Thanks, Manfred
during configuration and initialisation of the FPGA ???
Can there be an input on the IO-Pins during configuration and initialisation
???
Especially can there be a clock on GCLK0-Pin during configuration and
initialisation ???
Thanks, Manfred