Guest
Hi all,
I'm looking for a standard cell library for use with Alliance.
At least that's what I think I'm looking for.
I want to take some VHDL, and play with the layout of the logic, for
an ASIC, to see the effect of placement on the performance.
Pointers? Clues? Redirection?
TIA,
Gary
g w helbig - at - yahoo - dot - com
(no spaces, no dashes, the rest is obvious)
I'm looking for a standard cell library for use with Alliance.
At least that's what I think I'm looking for.
I want to take some VHDL, and play with the layout of the logic, for
an ASIC, to see the effect of placement on the performance.
Pointers? Clues? Redirection?
TIA,
Gary
g w helbig - at - yahoo - dot - com
(no spaces, no dashes, the rest is obvious)