AHB Models

T

terabits

Guest
Hi

Can anyone gimme the links to ahb master and slave models ? in verilog
?
opencores has some vhdl !!!!!!!! but no verilog.

Regards.
 
or if u have,,,u can mail me to tera.bits@gmail.com !!!

thanks...

On Dec 12, 9:55 am, "terabits" <tera.b...@gmail.com> wrote:
Hi

Can anyone gimme the links to ahb master and slave models ? in verilog
?
opencores has some vhdl !!!!!!!! but no verilog.

Regards.
Click to expand...
 
COULD SOMEONE RESPOND TO THIS PLS ?

On Dec 12, 9:56 am, "terabits" <tera.b...@gmail.com> wrote:
or if u have,,,u can mail me to tera.b...@gmail.com !!!

thanks...

On Dec 12, 9:55 am, "terabits" <tera.b...@gmail.com> wrote:

Hi

Can anyone gimme the links to ahb master and slave models ? in verilog
?
opencores has some vhdl !!!!!!!! but no verilog.

Regards.
Click to expand...
 
Well now your yelling ... no one is going to help if you are rude.

"terabits" <tera.bits@gmail.com> wrote in message
news:1166463944.297022.267850@73g2000cwn.googlegroups.com...
COULD SOMEONE RESPOND TO THIS PLS ?

On Dec 12, 9:56 am, "terabits" <tera.b...@gmail.com> wrote:
or if u have,,,u can mail me to tera.b...@gmail.com !!!

thanks...

On Dec 12, 9:55 am, "terabits" <tera.b...@gmail.com> wrote:

Hi

Can anyone gimme the links to ahb master and slave models ? in verilog
?
opencores has some vhdl !!!!!!!! but no verilog.

Regards.
Click to expand...
 
hey sorry if it sounded rude, could you see the PLS in the end it is
please...
i am emphasizing on my words by making them bold..it is not rude..
m sorry again if it felt that way..........

On Dec 18, 10:01 am, "Mike Lewis" <some...@micrsoft.com> wrote:
Well now your yelling ... no one is going to help if you are rude.

"terabits" <tera.b...@gmail.com> wrote in messagenews:1166463944.297022.267850@73g2000cwn.googlegroups.com...

COULD SOMEONE RESPOND TO THIS PLS ?

On Dec 12, 9:56 am, "terabits" <tera.b...@gmail.com> wrote:
or if u have,,,u can mail me to tera.b...@gmail.com !!!

thanks...

On Dec 12, 9:55 am, "terabits" <tera.b...@gmail.com> wrote:

Hi

Can anyone gimme the links to ahb master and slave models ? in verilog
?
opencores has some vhdl !!!!!!!! but no verilog.

Regards.
Click to expand...
 
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