T
talkb
Guest
When I evaluated Active-HDL this past summer (7.2sp1), I liked the
user-interface more than Modelsim. However, Aldec's Systemverilog support
was quite far behind Modelsim 6.2g.
Now, I was wondering how these two products compare, today.
Looking at Aldec's online manual, it seems Active-HDL 7.3 has caught up
with Modelsim PE. (PE still supports some constructs that Aldec doesn't,
but Aldec has rudimentary support for classes.)
Performance-wise which is faster? (Most likely, my decision is between
Active-HDL "Plus Edition" and Modelsim-PE.)
Any problems with the Smartmodel/LMTV interface? (This is standard
for Modelsim/PE, but a separate upgrade for Active-HDL Plus-Edition.)
And a final question. I know that Xilinx/Altera's development-suite
officially support the Modelsim simulator. For example, the Xilinx EDK
can autogenerate control-scripts and autolaunch a Modelsim session.
Does Active-HDL have the same level of integration with Xilinx/Altera's
development environment?
user-interface more than Modelsim. However, Aldec's Systemverilog support
was quite far behind Modelsim 6.2g.
Now, I was wondering how these two products compare, today.
Looking at Aldec's online manual, it seems Active-HDL 7.3 has caught up
with Modelsim PE. (PE still supports some constructs that Aldec doesn't,
but Aldec has rudimentary support for classes.)
Performance-wise which is faster? (Most likely, my decision is between
Active-HDL "Plus Edition" and Modelsim-PE.)
Any problems with the Smartmodel/LMTV interface? (This is standard
for Modelsim/PE, but a separate upgrade for Active-HDL Plus-Edition.)
And a final question. I know that Xilinx/Altera's development-suite
officially support the Modelsim simulator. For example, the Xilinx EDK
can autogenerate control-scripts and autolaunch a Modelsim session.
Does Active-HDL have the same level of integration with Xilinx/Altera's
development environment?