Actel v. Xilinx

  • Thread starter Brad Smallridge
  • Start date
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Brad Smallridge

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How does Actel ProASIC compare to XILINX?
I am looking for about 6000 registers, some FIFOs,
cost, and easy to learn software.

Thanks in advance,

Brad
 
"Brad Smallridge" <bsmallridge@dslextreme.com> wrote in message
news:102biulrc8td6e6@corp.supernews.com...
How does Actel ProASIC compare to XILINX?
I am looking for about 6000 registers, some FIFOs,
cost, and easy to learn software.
APA075 in TQFP100 small qty 17 EURO,
xilinx prices you can get from www.digikey.com

Actel - there is no free software !!!
you can get a starterkit that has 6 month software that works for smalles
ProAsic but if you need any other device support be prepared to pay 2,500$
yearly license fees.

Software useability
Actel Libero is a pain and in most cases the build processes fails at some
point. We have been able to get it todo something in some occasions, but
usually its not very easy.
Xilinx is way better.

Sorry Actel - I have tried Libero, I really have, but still I can change my
comments about it.

Actel has some advantages like true single chip, IP security, etc.. but be
prepared to pay for it.

antti
xilinx.openchip.org
 
"Antti Lukats" <antti@case2000.com> wrote:
"Brad Smallridge" <bsmallridge@dslextreme.com> wrote
How does Actel ProASIC compare to XILINX?
ProAsic is Flash based where Xilinx is SRAM based. This means, that
Xilinx needs to be reconfigured on every power-up.
Xilinx has lot more IO, RAM and logic, whereas Actel provides more
registers (data based on actual data sheeds, never tried a practical
comparison).

I am looking for about 6000 registers, some FIFOs,
cost, and easy to learn software.

APA075 in TQFP100 small qty 17 EURO,
xilinx prices you can get from www.digikey.com
APA075 is a bit small for 6000 registers :).
APA150 has max 6144 registers, I would use APA300 or APA450 for that
design size.

Actel - there is no free software !!!
Libero Silver is free, but I don't thing it supports APA devices.

Software useability
Actel Libero is a pain and in most cases the build processes fails at some
point. We have been able to get it todo something in some occasions, but
usually its not very easy.
Most of my problems doing Actel designs result from Synplify. But XST
or Fpga_Express for Xilinx synthesis are also a bit tricky.

bye Thomas
 

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