accessing 2D arrays in Verilog

D

daluu

Guest
I'm just learning Verilog in my Digital Design class. We focus more on
module design using Verilog than the actual verilog language.

I see these lines in code in our lab projects:

reg [N_channel*Data_width-1:0] in_tb_array[999:0];
...
...
Result_array <= [Data_width-1:0] in_tb_array;

This line gave compile problems in ModelSim.

I would believe by traditional programming construct the way to write it
the array assignment would be:

Result_array <= in_tb_array[Data_width-1:0];

This didn't give any compile errors. It appears to work in simulation, so
I just wanted to verify that my line of code is correct or not.
 
yea I just noticed that after readin your post. But what if I wanted only a
segment of the data width. Is my line of code correct?
 
Yes.

As long as your tool is fully Verilog 2001 compliant. I'm using a tool
which *still* doesn't have the 2-D array "part select" supported which would
correspond to the final [Data_width-1:0] reference.

"daluu" <cuuld@yahoo.com> wrote in message
news:a1444a526832acc85b1e841a40e32734@localhost.talkaboutprogramming.com...
yea I just noticed that after readin your post. But what if I wanted only
a
segment of the data width. Is my line of code correct?
 
"daluu" <cuuld@yahoo.com> wrote in message news:<36f451ee95776ad29c5ec9a34d892169@localhost.talkaboutprogramming.com>...
I'm just learning Verilog in my Digital Design class. We focus more on
module design using Verilog than the actual verilog language.

I see these lines in code in our lab projects:

reg [N_channel*Data_width-1:0] in_tb_array[999:0];
..
..
Result_array <= [Data_width-1:0] in_tb_array;

This line gave compile problems in ModelSim.

I would believe by traditional programming construct the way to write it
the array assignment would be:

Result_array <= in_tb_array[Data_width-1:0];

This didn't give any compile errors. It appears to work in simulation, so
I just wanted to verify that my line of code is correct or not.

I think Result_array <= in_tb_array; should be enough.
 

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