Guest
I am running a simple ac analysis (1GHz to 5GHz) for single NMOS
transistor. The schematic is setup as shown in the link
below:http://www.geocities.com/mxkdirs/acfet.html
I am getting wierd results and I thought something might be up with my
dc/ac blocking elements. I know I will need dc blocking cap but I
wasn't sure about ac blocking inductor. Please look at the schematic
to see what I am saying. I am undergradute and I don't know how to put
the question: I guess what I'm asking is that if I have an inductor as
ac block (meaning approx. open circuit) but wouldn't it stop my dc Vgs
to get to the NMOS gate because I'm running my simulation from 1GHz to
5GHz and at that high frequency inductor will be like an open. I don't
understand how ac analysis work. Does ac analysis look for dc sources
to fix the bias and then run ac simulation? Also, after running ac
simulation how can I tell if my NMOS is biased as Analog Environment
doesn't allow me to print DC operating points after an ac simulation.
Thank you
Mike
transistor. The schematic is setup as shown in the link
below:http://www.geocities.com/mxkdirs/acfet.html
I am getting wierd results and I thought something might be up with my
dc/ac blocking elements. I know I will need dc blocking cap but I
wasn't sure about ac blocking inductor. Please look at the schematic
to see what I am saying. I am undergradute and I don't know how to put
the question: I guess what I'm asking is that if I have an inductor as
ac block (meaning approx. open circuit) but wouldn't it stop my dc Vgs
to get to the NMOS gate because I'm running my simulation from 1GHz to
5GHz and at that high frequency inductor will be like an open. I don't
understand how ac analysis work. Does ac analysis look for dc sources
to fix the bias and then run ac simulation? Also, after running ac
simulation how can I tell if my NMOS is biased as Analog Environment
doesn't allow me to print DC operating points after an ac simulation.
Thank you
Mike