About the setup time of BUFGMUX in Spartan6

J

jianhuawow

Guest
I'm so confused about the setup time of BUFGMUX. In the datasheet of Spartan6, this spec is defined relatively to rising edge.

But if the structure of BUFGMUX is like
http://www.design-reuse.com/articles/5827/techniques-to-make-clock-switching-glitch-free.html

Then the setup time should be defined relatively to falling edge. Because the couple-register pair are both triggered with clock's negative edge.

Why? What the actual structure of BUFGMUX in Spartan6.

Thanks a lot.
 
I would be hesitant to refer to a non-Xilinx diagram for the internal structure of the BUFGMUX block. Plus the author is a technical staff member at Altera, so he's probably writing either:
a. Generically
-or-
b. About an Altera FPGA

I'd pay attention to whatever is in the Spartan6 User's Guide and datasheet and forget about whatever you read in this article (pull some concepts from it, yes, but don't make it your new religion about the S6).
 

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