about systemverilog compilation

M

mamtachalana

Guest
hello
i m doing modelling through system verilog,can anybody tellme how to
do that
suppose for example i want to make model of an "and gate",then what
will be the code and how can i compile this through VCS,DPI usage in
it...
in short which libraries i require for it..which compiler,what r the
prerequistes which i need for it..
thanks & regds
mamta
 

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