Abiding by the USB 100mA, 500mA rule

[Winfield Hill]

Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG?dl=0

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.


--
Thanks,
- Win

 

[Ricky C]

On Sunday, April 26, 2020 at 5:39:54 PM UTC-4, Winfield Hill wrote:

Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG?dl=0

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.

Did you have a question?

You say you see the concern of using a fixed delay rather than letting the CPU control it, but you are out of I/O pins on the CPU. F2 is listed as an input to the CPU. Where does it come from? It looks like U12 is enabled by either F1 or F2. I'm wondering if there's a way to change the way they work and free up an I/O pin. What voltage is the CPU running on? If it's the LDO, U12, do you only need to provide one of the two to the CPU? It won't run unless at least one is up.

Maybe an input can be tristated to combine these two signals? Use tristate buffers or just transistors. When F1 is low it's driver pulls down. When F2 is low it's driver pulls up. Otherwise the input to the MCU floats and the MCU can pull it up or down with brief pulses to test. Or use a pair of resistors to set the voltage to a mid point and measure with an ADC. Hard to imagine a 48 pin MCU without an ADC. I'm pretty sure there's a TTL quad tristate buffer. Likely to be a tiny gate part with just one or two in a SOT-23 or an 8 pin package.

SN74LVC2G241 and SN74LVC2G125 seem virtually like the same part. $0.08

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[Winfield Hill]

Ricky C wrote...

On Sunday, April 26, 2020< Winfield Hill wrote:

Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.

Did you have a question?

Thanks very much for your comments, that's what I was
looking for.

You say you see the concern of using a fixed delay rather
than letting the CPU control it, but you are out of I/O
pins on the CPU. F2 is listed as an input to the CPU.
Where does it come from?

It comes from a zero-power general ON/OFF flip flop.
When the flip-flop is off, current drain is under 1uA.

It looks like U12 is enabled by either F1 or F2. I'm
wondering if there's a way to change the way they work
and free up an I/O pin.

Actually, the CPU samples the two flags and other inputs
by momentarily setting outputs to inputs, using "no pins".

What voltage is the CPU running on? If it's the LDO,
U12, do you only need to provide one of the two to the
CPU? It won't run unless at least one is up.

Good point, be it's slightly useful to know if both are
up, and the inputs are free.

Snip other good comments. Finally I decided to ditch
the entire follow-the-old rules scene, and specify the
instrument be powered from common USB charging modules.

And I decided to grab two output pins by degrading the
functionality from 18 channels to 16 channels. Now the
CPU controls charging and power timing, and it's much
sensible. This drawing also shows the ON/OFF flip flop.

https://www.dropbox.com/s/3seh308bo6jbddz/USB-0.75A-CL%2BCPU.JPG?dl=0


--
Thanks,
- Win

 

[Ricky C]

On Monday, April 27, 2020 at 3:37:52 PM UTC-4, Winfield Hill wrote:

Ricky C wrote...

On Sunday, April 26, 2020< Winfield Hill wrote:

Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.

Did you have a question?

Thanks very much for your comments, that's what I was
looking for.

You say you see the concern of using a fixed delay rather
than letting the CPU control it, but you are out of I/O
pins on the CPU. F2 is listed as an input to the CPU.
Where does it come from?

It comes from a zero-power general ON/OFF flip flop.
When the flip-flop is off, current drain is under 1uA.

It looks like U12 is enabled by either F1 or F2. I'm
wondering if there's a way to change the way they work
and free up an I/O pin.

Actually, the CPU samples the two flags and other inputs
by momentarily setting outputs to inputs, using "no pins".

What voltage is the CPU running on? If it's the LDO,
U12, do you only need to provide one of the two to the
CPU? It won't run unless at least one is up.

Good point, be it's slightly useful to know if both are
up, and the inputs are free.

Snip other good comments. Finally I decided to ditch
the entire follow-the-old rules scene, and specify the
instrument be powered from common USB charging modules.

And I decided to grab two output pins by degrading the
functionality from 18 channels to 16 channels. Now the
CPU controls charging and power timing, and it's much
sensible. This drawing also shows the ON/OFF flip flop.

https://www.dropbox.com/s/3seh308bo6jbddz/USB-0.75A-CL%2BCPU.JPG?dl=0

Not sure how you will feel if I suggest the schematic diagram is not so easy to read for most people who didn't create it. There are many aspects that have to be "decoded". One is the use of inverter symbols for transistors.. It would be most helpful if open collector symbols were provided, but what's wrong with drawing transistors? I guess you don't want to bother with the resistor details. Then the OC symbol would be useful. It would also be useful if it were a PDF with searchable text rather than an image. Where is the other end of Vin or the other part of U18?

Mostly it is the congestion that makes it hard to read and follow the flow. This second design is easier to follow than the first. Some others post schematics that look like a couple of op amps on a B sized sheet with so much white space the full drawing can't be seen while also being able to make out the text even though it's only a few parts.

Otherwise not much to comment on except to ask about the power indicator. Is that a blinker that can be turned on solid by either the power switch or the CPU? Looks like it will blink on very briefly and off for around a quarter second. It is off only when there is no power? Why does the power on signal F2 drive the indicator through a cap??? I'm not getting this at all.

I'm very surprised the charging chip and the output regulator can't be found in a single device along with the input voltage level detector and various other circuitry. It's not like no one designs these sorts of applications in quantity.

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

 

[Winfield Hill]

Ricky C wrote...

On Monday, April 27, 2020, Winfield Hill wrote:
Ricky C wrote...
On Sunday, April 26, 2020< Winfield Hill wrote:

Thanks very much for your comments, that's what I was
looking for.

You say you see the concern of using a fixed delay rather
than letting the CPU control it, but you are out of I/O
pins on the CPU. F2 is listed as an input to the CPU.
Where does it come from?

It comes from a zero-power general ON/OFF flip flop.
When the flip-flop is off, current drain is under 1uA.

It looks like U12 is enabled by either F1 or F2. I'm
wondering if there's a way to change the way they work
and free up an I/O pin.

Actually, the CPU samples the two flags and other inputs
by momentarily setting outputs to inputs, using "no pins".

What voltage is the CPU running on? If it's the LDO,
U12, do you only need to provide one of the two to the
CPU? It won't run unless at least one is up.

Good point, be it's slightly useful to know if both are
up, and the inputs are free.

Snip other good comments. Finally I decided to ditch
the entire follow-the-old rules scene, and specify the
instrument be powered from common USB charging modules.

And I decided to grab two output pins by degrading the
functionality from 18 channels to 16 channels. Now the
CPU controls charging and power timing, and it's much
sensible. This drawing also shows the ON/OFF flip flop.

https://www.dropbox.com/s/3seh308bo6jbddz/USB-0.75A-CL%2BCPU.JPG?dl=3D0

Not sure how you will feel if I suggest the schematic
diagram is not so easy to read for most people who
didn't create it. There are many aspects that have
to be "decoded". One is the use of inverter symbols
for transistors. It would be most helpful if open
collector symbols were provided, but what's wrong
with drawing transistors? I guess you don't want to
bother with the resistor details. Then the OC symbol
would be useful.

Yes, I agree. I added little oc to the BRT (that means
bias-resistor transistor). The IEEE symbol is much too
complex to render in a small component symbol. I used
to add a vertical line, at the inverter triangle apex.

It would also be useful if it were a PDF with searchable
text rather than an image.

OK, I have put up the entire schematic, which is a
searchable pdf. But I'm afraid now you'll really
roast me over the coals, for a complex drawing,
with lots going on and even more to decode.

https://www.dropbox.com/s/aa2fyr1kqeb500i/RIS-787_sch_v0.91.pdf?dl=1

> Where is the other end of Vin or the other part of U18?

The full schematic shows these aspects. U18 is powered
from Vin, which is higher than 3.3V, but thankfully
U12's enable allows that.

Mostly it is the congestion that makes it hard to
read and follow the flow.

This second design is easier to follow than the first.
Some others post schematics that look like a couple of
op amps on a B sized sheet with so much white space the
full drawing can't be seen while also being able to make
out the text even though it's only a few parts.

Yes, and spread the drawing across six pages, in which
you have to search every label, to find out what's
connected to what. I like having it all available,
even if it gets a little crowded. Haha, I've noticed
many of my designs keep expanding until the page is
filled up. Once portions get moved to a 2nd or even
a 3rd page, the whole thing starts to get unwieldy.

Otherwise not much to comment on except to ask about the
power indicator. Is that a blinker that can be turned on
solid by either the power switch or the CPU? Looks like
it will blink on very briefly and off for around a
quarter second. It is off only when there is no power?

Correct. Unlike most designs, where the OFF state has
the CPU still running, in my design, when the U14 toggle
is OFF, the power really is off, with a draw under 1uA.
That way an OFF device can sit on a shelf for a year,
without discharging or otherwise abusing its battery.

After turning on U14, the CPU can run at 32kHz, drawing
20uA or so, and an indicator is needed so the user will
know it's "on". The LED flashes at a 2% duty cycle,
drawing another 20uA on average. It can operate for
months in this standby operating state, but we expect
the user will notice the flashes and turn it off. When
the instrument is busy working, maybe drawing hundreds
of mA, the same LED is on continuously (E3 and Q9).
Another LED and a beeper will also be indicating what
it's doing and how it's progressing, or when finished.

Why does the power on signal F2 drive the indicator
through a cap??? I'm not getting this at all.

Hey, I'm proud of that little addition. When you turn
on the device, should you have to stare at it, waiting
to see a brief flash? No, instead the LED instantly
makes a longer, easily-noticed 22ms flash (4.7uF*47k),
before continuing with the more brief 5ms flashes. One
thing with the prototype, will be to optimize the LED
indicator timings. The part values are place holders.

I'm very surprised the charging chip and the output
regulator can't be found in a single device along with
the input voltage level detector and various other
circuitry. It's not like no one designs these sorts
of applications in quantity.

Yes, maybe. I'm fearful of poorly-cared-for Li-Ion
batteries. The MCP73841-4.1 had all the features I
was looking for, including thermal monitoring and
shutoff. Another aspect in my parts searches was
package size, and U5 comes in a small MSOP-10. Many
charging controllers come in much larger packages,
but it's possible there's a perfect part out there,
that would replace much of the rest of my circuitry,
and in the end take less space. Maybe. Sigh.


--
Thanks,
- Win

 

[Ricky C]

On Tuesday, April 28, 2020 at 5:47:46 AM UTC-4, Winfield Hill wrote:

Ricky C wrote...

On Monday, April 27, 2020, Winfield Hill wrote:
Ricky C wrote...
On Sunday, April 26, 2020< Winfield Hill wrote:

Thanks very much for your comments, that's what I was
looking for.

You say you see the concern of using a fixed delay rather
than letting the CPU control it, but you are out of I/O
pins on the CPU. F2 is listed as an input to the CPU.
Where does it come from?

It comes from a zero-power general ON/OFF flip flop.
When the flip-flop is off, current drain is under 1uA.

It looks like U12 is enabled by either F1 or F2. I'm
wondering if there's a way to change the way they work
and free up an I/O pin.

Actually, the CPU samples the two flags and other inputs
by momentarily setting outputs to inputs, using "no pins".

What voltage is the CPU running on? If it's the LDO,
U12, do you only need to provide one of the two to the
CPU? It won't run unless at least one is up.

Good point, be it's slightly useful to know if both are
up, and the inputs are free.

Snip other good comments. Finally I decided to ditch
the entire follow-the-old rules scene, and specify the
instrument be powered from common USB charging modules.

And I decided to grab two output pins by degrading the
functionality from 18 channels to 16 channels. Now the
CPU controls charging and power timing, and it's much
sensible. This drawing also shows the ON/OFF flip flop.

https://www.dropbox.com/s/3seh308bo6jbddz/USB-0.75A-CL%2BCPU.JPG?dl=3D0

Not sure how you will feel if I suggest the schematic
diagram is not so easy to read for most people who
didn't create it. There are many aspects that have
to be "decoded". One is the use of inverter symbols
for transistors. It would be most helpful if open
collector symbols were provided, but what's wrong
with drawing transistors? I guess you don't want to
bother with the resistor details. Then the OC symbol
would be useful.

Yes, I agree. I added little oc to the BRT (that means
bias-resistor transistor). The IEEE symbol is much too
complex to render in a small component symbol. I used
to add a vertical line, at the inverter triangle apex.

Once I spent more time with the schematic I noticed the BRT label and also realized you have a miniature resistor on the input which is also a clue. It was when I saw all the pin numbers were 1, 2, 3 I realized something was up and checked the data sheet. Still, I think I would have just used a transistor symbol.

It would also be useful if it were a PDF with searchable
text rather than an image.

OK, I have put up the entire schematic, which is a
searchable pdf. But I'm afraid now you'll really
roast me over the coals, for a complex drawing,
with lots going on and even more to decode.

https://www.dropbox.com/s/aa2fyr1kqeb500i/RIS-787_sch_v0.91.pdf?dl=1

No roasting. I accept your disease. It's not the complexity, it's the density which causes a loss of the very useful graphical clues to grouping and flow. Just as in writing code, the white space directs your eye to the levels and structure of the code, white space on a schematic provide information about the logical groupings. The orientation gives clues about the flow either electrical or logical.

I have no complaints at all about the details provided. I try to do the same thing, it's like a reduced version of the design notes.

Where is the other end of Vin or the other part of U18?

The full schematic shows these aspects. U18 is powered
from Vin, which is higher than 3.3V, but thankfully
U12's enable allows that.

Mostly it is the congestion that makes it hard to
read and follow the flow.

This second design is easier to follow than the first.
Some others post schematics that look like a couple of
op amps on a B sized sheet with so much white space the
full drawing can't be seen while also being able to make
out the text even though it's only a few parts.

Yes, and spread the drawing across six pages, in which
you have to search every label, to find out what's
connected to what. I like having it all available,
even if it gets a little crowded. Haha, I've noticed
many of my designs keep expanding until the page is
filled up. Once portions get moved to a 2nd or even
a 3rd page, the whole thing starts to get unwieldy.

That's the ultimate problem. A complex design is hard to represent simply.

Otherwise not much to comment on except to ask about the
power indicator. Is that a blinker that can be turned on
solid by either the power switch or the CPU? Looks like
it will blink on very briefly and off for around a
quarter second. It is off only when there is no power?

Correct. Unlike most designs, where the OFF state has
the CPU still running, in my design, when the U14 toggle
is OFF, the power really is off, with a draw under 1uA.
That way an OFF device can sit on a shelf for a year,
without discharging or otherwise abusing its battery.

After turning on U14, the CPU can run at 32kHz, drawing
20uA or so, and an indicator is needed so the user will
know it's "on". The LED flashes at a 2% duty cycle,
drawing another 20uA on average. It can operate for
months in this standby operating state, but we expect
the user will notice the flashes and turn it off. When
the instrument is busy working, maybe drawing hundreds
of mA, the same LED is on continuously (E3 and Q9).
Another LED and a beeper will also be indicating what
it's doing and how it's progressing, or when finished.

I just now see the other clue they are transistors, the label Qx. Another casualty of the drawing density and lack of white space. The PCB I have in production is so tight the ref des are all jammed in around the parts and it's hard to tell which ref des is with which part. Basically the ref des now only serve as land marks and you need a drawing of the PCB to find anything.

The LED driver circuit is a great piece of work. So the MCU is on any time the power is on? Why can't the MCU then just toggle the LED directly? The three states are, all power off, power on-CPU at 32 kHz, power on-CPU at full speed designated by no LED, flashing LED and on solid LED. That should be very easy to do in the MCU software without any of the U15, Q8, Q9, etc. But maybe I'm missing some info or feature this circuit provides.

Why does the power on signal F2 drive the indicator
through a cap??? I'm not getting this at all.

Hey, I'm proud of that little addition. When you turn
on the device, should you have to stare at it, waiting
to see a brief flash? No, instead the LED instantly
makes a longer, easily-noticed 22ms flash (4.7uF*47k),
before continuing with the more brief 5ms flashes. One
thing with the prototype, will be to optimize the LED
indicator timings. The part values are place holders.

Yeah, I see that now about the cap.

I'm very surprised the charging chip and the output
regulator can't be found in a single device along with
the input voltage level detector and various other
circuitry. It's not like no one designs these sorts
of applications in quantity.

Yes, maybe. I'm fearful of poorly-cared-for Li-Ion
batteries. The MCP73841-4.1 had all the features I
was looking for, including thermal monitoring and
shutoff. Another aspect in my parts searches was
package size, and U5 comes in a small MSOP-10. Many
charging controllers come in much larger packages,
but it's possible there's a perfect part out there,
that would replace much of the rest of my circuitry,
and in the end take less space. Maybe. Sigh.

I appreciate that you consider this constructive criticism. I was a bit worried on my previous post that it might not be well received.

I know how hard it is to find the right parts. Very hard sometimes. That's one of the good things about this group. Lots of experience.

--

Rick C.

-- Get 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209

 

[piglet]

On 26/04/2020 10:39 pm, Winfield Hill wrote:

Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG?dl=0

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.

Hi Win, Sorry to be a few days behind seeing this thread. If you can
ensure the payload current is initially below about 50mA until well
after the bulk cap is charged then the 500mA inrush limit can be
enforced by quite a simple descrete circuit:

<www.dropbox.com/s/x8458hud0lhderr/SED_500mA_USB_Inrush.pdf>

piglet

 

[Winfield Hill]

piglet wrote...

On 26/04/2020 10:39 pm, Winfield Hill wrote:
Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG?dl=0

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.

Hi Win, Sorry to be a few days behind seeing this thread.
If you can ensure the payload current is initially below
about 50mA until well after the bulk cap is charged then
the 500mA inrush limit can be enforced by quite a simple
descrete circuit:

www.dropbox.com/s/x8458hud0lhderr/SED_500mA_USB_Inrush.pdf

I'm using Fairchild's FPF2125 for input current limiting.
Originally I had jumper settings for < 100mA or 450mA.
But I threw in the towel on meeting the 100mA rule, and
changed the low value to 450mA, and the high value to
under an amp, or more. My spec will be to use a phone
charger, etc., with the micro-USB cable. When it's run
from a computer, for development, etc., either it'll be
allowed 0.5A at startup, or if not, start the instrument
from the battery, before plugging in the computer.


--
Thanks,
- Win

 

[piglet]

On 02/05/2020 4:38 pm, Winfield Hill wrote:

piglet wrote...

On 26/04/2020 10:39 pm, Winfield Hill wrote:
Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG?dl=0

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.

Hi Win, Sorry to be a few days behind seeing this thread.
If you can ensure the payload current is initially below
about 50mA until well after the bulk cap is charged then
the 500mA inrush limit can be enforced by quite a simple
descrete circuit:

www.dropbox.com/s/x8458hud0lhderr/SED_500mA_USB_Inrush.pdf

I'm using Fairchild's FPF2125 for input current limiting.
Originally I had jumper settings for < 100mA or 450mA.
But I threw in the towel on meeting the 100mA rule, and
changed the low value to 450mA, and the high value to
under an amp, or more. My spec will be to use a phone
charger, etc., with the micro-USB cable. When it's run
from a computer, for development, etc., either it'll be
allowed 0.5A at startup, or if not, start the instrument
from the battery, before plugging in the computer.

Yes, I am sure the FPF2125 is the proper way. I am wary of sole-sourced
parts, was burnt once when product started selling big and then key part
went to 99 week leadtime!

piglet

 

[Winfield Hill]

piglet wrote...

On 02/05/2020 4:38 pm, Winfield Hill wrote:
piglet wrote...

On 26/04/2020 10:39 pm, Winfield Hill wrote:
Struggling to meet strict USB current-draw rules.

Some of the problems start with small TI buck and
boost converters that use the Peak Current Control
method, with the input current always ramping up
to a high maximum value. Multiple converters run
from the supply, and capacitors C1 C2 = 100uF try
to average the current to under 500mA. Schematic:

https://www.dropbox.com/s/molbaxwm0ek3r4j/USB-CL.JPG?dl=0

Connecting 100uF to a USB 5V line is like a short,
and can trigger a port shutdown. U20 sources 100mA
until C1 charges to 4.55V, in about 5ms. Next U18
starts 3.3V supply U12, and wakes the CPU with F1.
U19 executes 320ms wait, during which time the CPU
should achieve enumeration permission to draw 500mA.
After the 320ms, U21 is added to reach an allowed
450mA draw, and the U5 battery charger is turned on.
I see now that U19 timing, etc., should be handled
by the CPU. It's a 48-pin part with all pins used,
but we really need its management in this case.

Hi Win, Sorry to be a few days behind seeing this thread.
If you can ensure the payload current is initially below
about 50mA until well after the bulk cap is charged then
the 500mA inrush limit can be enforced by quite a simple
descrete circuit:

www.dropbox.com/s/x8458hud0lhderr/SED_500mA_USB_Inrush.pdf

I'm using Fairchild's FPF2125 for input current limiting.
Originally I had jumper settings for < 100mA or 450mA.
But I threw in the towel on meeting the 100mA rule, and
changed the low value to 450mA, and the high value to
under an amp, or more. My spec will be to use a phone
charger, etc., with the micro-USB cable. When it's run
from a computer, for development, etc., either it'll be
allowed 0.5A at startup, or if not, start the instrument
from the battery, before plugging in the computer.

Yes, I am sure the FPF2125 is the proper way. I am wary of
sole-sourced parts, was burnt once when product started
selling big and then key part went to 99 week leadtime!

You won't get far with specialized designs if you rule out
single-source parts. My approach for unusual parts, is to
place an reasonable supply order before finalizing the PCB.
Then as you approach full-scale production, should you be
so lucky, order reels of the vulnerable parts.


--
Thanks,
- Win

 

[Ricky C]

I'm working on a power fail alarm for a ventilator project and I'd like to use some of your ideas. The alarm needs it's own power source obviously. Instead of using a small battery, I found an indicator with low enough current that it can be driven from a supercap. I'm thinking it will be simpler to charge that up than a battery.

I was going to use a linear regulator with a current limit to charge the supercap. The ADP121 looked good until I read the input and output cap requirements. The output cap is fine with the 2.5F supercap on it. But according to the data sheet the input cap needs to be as large!!! I assume I need to abide by that and find another part. Or is that about step response or some other issue that I won't need to worry with charging the supercap up to a limited voltage?

Any other parts that don't have this restriction and still have the very low quiescent current drain?

I'm looking at the many tricks you did with the power on FF and the alarm pulsing circuit. To minimize the size of the supercap I'm going to pulse the indicator when sounded. I'll need a FF because the alarm has to be silenceable. So the power failing will trigger the alarm through a cap and pressing the silence button will end the alarm. Not sure if the silence button will be required to be pressed periodically. If this gets too complex it becomes software in an MCU. Analog discretes have so many boundary conditions to explore. Software for simple tasks can be done very simply.

Open to any suggestions.

--

Rick C.

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[Ricky C]

Win,

I was looking at using the NCP302LSN45 in my design and I realized it has no power pin. It would appear to scavenge power from the sense input, pin 2.. If this device has no power at all on pin 2, as it would with no USB connection, how could it pull low on the output, pin 1?

The data sheet only assures operation when pin 2 is at some nominal level, 0.65 Vtyp and 0.80 Vmax. I don't see any other source of power feeding pin 2 other than the USB connection. Can this device be relied on to pull down on F1 when the USB is not connected?

--

Rick C.

+- Get 1,000 miles of free Supercharging
+- Tesla referral code - https://ts.la/richard11209

 

[Winfield Hill]

Ricky C wrote...

Win,

I was looking at using the NCP302LSN45 in my design
and I realized it has no power pin. It would appear
to scavenge power from the sense input, pin 2. If
this device has no power at all on pin 2, as it would
with no USB connection, how could it pull low on the
output, pin 1?

The data sheet only assures operation when pin 2 is
at some nominal level, 0.65 Vtyp and 0.80 Vmax.
I don't see any other source of power feeding pin 2
other than the USB connection. Can this device be
relied on to pull down on F1 when the USB is not
connected?

Hey, good catch Rick, just in time, before I order my
prototype PCB. The NCP3002 has a complementary output
so once its input see a supply, it pulls up. When the
input is off, or very low, the low-side FET can't work,
but maybe a body diode pulls down to the pin-2 voltage.
I'm adding a pull-down resistor to ground to make sure.


--
Thanks,
- Win

 

[Winfield Hill]

Ricky C wrote...

Software for simple tasks can be done very simply.
Open to any suggestions.

Yes. And very cheaply as well. Placing parts from
my B.O.M. into a Digi-Key cart, I was a surprised to
discover that my LM4128 voltage reference, at $2.43,
was more expensive than the powerful 48MHz SAMD21
Coretex M0+ controller, with 128k flash, at $2.24.

An ATTINY102-SSNR controller, in SOIC-8, costs about
50 cents, and can outperform complex analog circuits.
If you consider it to be just a cheap little part...
Ah, but then you have to program it.




--
Thanks,
- Win

 

[Ricky C]

On Tuesday, May 5, 2020 at 7:45:01 AM UTC-4, Winfield Hill wrote:

Ricky C wrote...

Software for simple tasks can be done very simply.
Open to any suggestions.

Yes. And very cheaply as well. Placing parts from
my B.O.M. into a Digi-Key cart, I was a surprised to
discover that my LM4128 voltage reference, at $2.43,
was more expensive than the powerful 48MHz SAMD21
Coretex M0+ controller, with 128k flash, at $2.24.

An ATTINY102-SSNR controller, in SOIC-8, costs about
50 cents, and can outperform complex analog circuits.
If you consider it to be just a cheap little part...
Ah, but then you have to program it.

Not sure if you are referring to the design cost of programming it or the recurring cost of flashing the program into the part. For simple designs the coding would be trivial. For more complex designs like your SAM part the coding can be much more significant. I think many people over estimate the complexity and cost of flashing a program into a part. There is always a test of the product and flashing can be incorporated into that with little cost.

I am working on a medical project currently and I don't yet know if there will be the typical complexities of designing medical equipment. A friend once worked for a company making the stuff and he had to be able to "prove" his designs worked and would never operate in a manner that would endanger health. I designing the power fail alarm which can harm someone simply by not working. How can I assure it will never fail to alarm if the power craps out??? I guess including two alarms complete with two sounders might do it.

Glad to help find the possible bug with the NCP3002. I kept searching your design for the pull down and couldn't find it. I ended up with the LT6700, a dual unit. Comes in three flavors of +/- polarities. I need two comparators and might use three if I make the design aware of it's state of charge other than full/not full. I'm also looking at the MCP65R46 single as the cost is a lot lower. I didn't realize the LT6700 dual is $1.68@100. The MCP65R46 single is only $0.33.

Reading about your design has helped me a lot in thinking about mine. Thanks.

--

Rick C.

++ Get 1,000 miles of free Supercharging
++ Tesla referral code - https://ts.la/richard11209

 

[Winfield Hill]

Ricky C wrote...

I kept searching your design for the pull down
and couldn't find it.

Added this morning, didn't see your post earlier.


--
Thanks,
- Win

 

[Ricky C]

On Tuesday, May 5, 2020 at 12:45:33 PM UTC-4, Winfield Hill wrote:

Ricky C wrote...

I kept searching your design for the pull down
and couldn't find it.

Added this morning, didn't see your post earlier.

Good that this was caught. I can see where this is a detail that could be missed. It was only after I realized there was no power pin on the device that it occurred to me there might be a problem.

I'm concerned about a similar issue with my design. Presently the entire design is powered off the supercap. Turning on the drive to the pass transistor to charge the supercap depends on providing a ground on a comparator O/C output as the supercap charges up from zero volts. I'm thinking of using a couple of Schottky diodes to wire OR the 5V rail and the supercap output to power this circuit. But is it needed? Don't know... I don't think a manufacturer will spec a chip at Vdd = 0V unless the chip is designed for that specifically.

It just occurred to me that I can get more capacity from the supercap if I charge it to the full 5V and use a regulator to drive the indicators. An LDO with less dropout than 1V will extend the useful voltage range as the cap discharges. If I have to wire OR the LDO output with the 5V rail it would be very useful if the LDO did not back feed power to the supercap.

Know of any very low dropout regulators for 10 mA that don't back feed?

Maybe the back feed is not important. Only the comparator needs power when the battery is zero voltage. I can wire OR power just for the comparators and power the indicators from an LDO. It is still important to have a low dropout voltage or it won't usefully extend the hold up time of the supercap. How low is a reasonable LDO drop out voltage for a 4 mA load?

In fact, I guess the comparator controlling the constant current charging circuit is not needed if charging the supercap to full 5V so no need for powering anything until the supercap is up to voltage. The only concern for the LDO is as low a dropout voltage as possible.

Thinking out loud here.

--

Rick C.

--- Get 1,000 miles of free Supercharging
--- Tesla referral code - https://ts.la/richard11209

 

[Tom Gardner]

On 28/04/20 10:47, Winfield Hill wrote:

Yes, and spread the drawing across six pages, in which
you have to search every label, to find out what's
connected to what.

That is indeed unsatisfactory, especially taken to extremes
where every net is names and there are very few wires. Relying
on a PDF viewer's "search" function is, um, suboptimal.

But there is a long-established alternative, which I'm
sure you must have seen and used.

For each "leaf" schematic, have all wires that goto other
leaf schematics terminated in a named symbol that looks
like a PCB edge connector. Then have an "interconnection"
schematic containing a block for each leaf schematic. Each
block has "pin" names matching those on the leaf schematic,
and the pins are connected by wires.

That way you can always trace from one pin to all others
merely by having your finger follow the line on the paper!

Why do you find that unacceptable?

I like having it all available,
even if it gets a little crowded. Haha, I've noticed
many of my designs keep expanding until the page is
filled up. Once portions get moved to a 2nd or even
a 3rd page, the whole thing starts to get unwieldy.

I certainly like your explanations and constraints being
right next to the relevant part of the schematic.

But your schematics don't guide the reader by drawing their
eyes to the commonly used "design pattern". That's a real
disadvantage, just as a non-prettyprinted computer program
is a pain.

Unless you are counting pretty programs like
https://www.ioccc.org/2019/dogon/prog.c
or
https://www.ioccc.org/2012/tromp/tromp.c

 

[Ricky C]

On Tuesday, May 5, 2020 at 5:44:20 PM UTC-4, Tom Gardner wrote:

On 28/04/20 10:47, Winfield Hill wrote:
Yes, and spread the drawing across six pages, in which
you have to search every label, to find out what's
connected to what.

That is indeed unsatisfactory, especially taken to extremes
where every net is names and there are very few wires. Relying
on a PDF viewer's "search" function is, um, suboptimal.

But there is a long-established alternative, which I'm
sure you must have seen and used.

For each "leaf" schematic, have all wires that goto other
leaf schematics terminated in a named symbol that looks
like a PCB edge connector. Then have an "interconnection"
schematic containing a block for each leaf schematic. Each
block has "pin" names matching those on the leaf schematic,
and the pins are connected by wires.

That way you can always trace from one pin to all others
merely by having your finger follow the line on the paper!

Why do you find that unacceptable?

Things similar to that are what I've seen "legislated" by various companies.. I think designers tend to want to take short cuts and make exceptions to rules, so they need to be enforced. As Win likes, for the designer who is familiar with the design it's better to have more on a page, while not so much for everyone else if it is too cramped and requires references without connecting lines.

One company I worked for dealt with the clutter on a page by using numbers in circles with an arrow pointing to the other matching circle with the same number and pointing back atcha.

I find often (especially digital designs with buses) the clutter is overwhelming and the drawing advantages are just lost entirely. At some point it might as well be some form of tabled net list to provide easy searching. The drawing is a bunch of small lists (IC, pin number, net name) scattered around the drawing anyway.

Someone I knew many years ago took over a design that was done that way and didn't like it. I think if it were done properly it might be better than a schematic for certain designs where the pictographs are not of much value..

I like having it all available,
even if it gets a little crowded. Haha, I've noticed
many of my designs keep expanding until the page is
filled up. Once portions get moved to a 2nd or even
a 3rd page, the whole thing starts to get unwieldy.

I certainly like your explanations and constraints being
right next to the relevant part of the schematic.

But your schematics don't guide the reader by drawing their
eyes to the commonly used "design pattern". That's a real
disadvantage, just as a non-prettyprinted computer program
is a pain.

Mostly the problems we perceive is the lack of adequate white space to divide functional sections and more clearly show interconnects crossing that white space. However adding the white space makes the drawing larger or makes the details smaller if shrunk down to the same total size. With many here in the age group where visual acuity is not optimal, none of us want smaller details.

--

Rick C.

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--+ Tesla referral code - https://ts.la/richard11209