A VHDL wannabe question

[A. Tomaszewski]

Would you, please, be kind enough as to direct me to some VHDL
compiler freeware capable of graphically (with the use of logic gates)
representing the circuitry specified in this language. I intend to
specify an 8080 compatible microprocessor this way (I have managed to
grasp the whole idea of microprocessor design, and need a tool for its
verification).

Thank you very much.

Andrew

 

[Mike Treseler]

A. Tomaszewski wrote:

Would you, please, be kind enough as to direct me to some VHDL
compiler freeware capable of graphically (with the use of logic gates)
representing the circuitry specified in this language.

Synthesizers like synplicity and leonardo call this
feature an rtl viewer. I don't know of any free versions.
However, you don't need a synthesizer until you are all
finished writing, simulating and debugging your code.

I intend to
specify an 8080 compatible microprocessor this way (I have managed to
grasp the whole idea of microprocessor design, and need a tool for its
verification).

If you haven't written any code yet,what you want is a VHDL simulator.
Check out Xilinx webpack.

-- Mike Treseler

 

[A. Tomaszewski]

Mike Treseler wrote:

Would you, please, be kind enough as to direct me to some VHDL
compiler freeware capable of graphically (with the use of logic gates)
representing the circuitry specified in this language.

Synthesizers like synplicity and leonardo call this
feature an rtl viewer. I don't know of any free versions.

What sort of cost am I looking at? I mean, all I need is a tool
capable of efficiently simulating a circuitry incorporating around
3,000 NANDs.

However, you don't need a synthesizer until you are all
finished writing, simulating and debugging your code.

So a synthetizer accepts VHDL code and emits graphics representing the
corresponding gate structure, right? (I am sorry. All I do know about
VHDL is that it is, nowadays, and for my purpose, the best of all
available tools.)

I intend to
specify an 8080 compatible microprocessor this way (I have managed to
grasp the whole idea of microprocessor design, and need a tool for its
verification).

If you haven't written any code yet,what you want is a VHDL simulator.

Check out Xilinx webpack.

Right. Thank you. I am mostly concerned with the graphical
representation, I do hope it's got this capability.

-- Mike Treseler

Thank you very much for writing.

Andrew

 

[Mike Treseler]

A. Tomaszewski wrote:

What sort of cost am I looking at? I mean, all I need is a tool
capable of efficiently simulating a circuitry incorporating around
3,000 NANDs.

Consider writing and siming your code first.
This will take longer than you expect.
When the code is done, get a free 30 day
license on a synth with an rtl viewer.

So a synthetizer accepts VHDL code and emits graphics representing the
corresponding gate structure, right?

Synthesis outputs a netlist file for place and route.
The netlist viewer is usually an option.

-- Mike Treseler

 

[A. Tomaszewski]

Mike Treseler wrote:

What sort of cost am I looking at? I mean, all I need is a tool
capable of efficiently simulating a circuitry incorporating around
3,000 NANDs.

Consider writing and siming your code first.

I am so sorry to bother you so much. Also, I am very grateful you
kindly allow me to occupy you for a while (many, many thanks). You
see, I understand I need an editor (don't have a clue what form it
might have) and a compiler (I mean, how do I know my code is
correct?). But then, since, as you know, the code for e.g. the D edge
triggered flip-flop which (normally, I think) serves as an IP in 80x86
is not THAT trivial, and also, since it's the first time I will write
in VHDL, I need to see it work (I don't have any experience at all, so
I can't do it "to touch").

I believe I need to take it one step at a time. Please, what tools
(editor?) do I need to use to write a VHDL code for my 16-bit D
counter? And, what tools (compiler?) do I need to see this code
operating, perhaps in the graphic form (as a NAND gate structure), and
also, maybe, in the form of timing diagrams.

I hope I am not causing you too much trouble.

This will take longer than you expect.

Oh yes. That is true, very very true. I do not expect robust progress
on this.

When the code is done, get a free 30 day
license on a synth with an rtl viewer.

Thank you very very much for this tip.

So a synthetizer accepts VHDL code and emits graphics representing the
corresponding gate structure, right?

Synthesis outputs a netlist file for place and route.
The netlist viewer is usually an option.

I reckon, there's plenty for me to learn. Thank you.

-- Mike Treseler

Thank you very much for your time.

Andrew

 

[Paul Uiterlinden]

A. Tomaszewski wrote:

I believe I need to take it one step at a time.

First step:

http://www.vhdl.org/vi/comp.lang.vhdl/ ;-)

Paul.

 

[Mike Treseler]

A. Tomaszewski wrote:

see, I understand I need an editor (don't have a clue what form it
might have) and a compiler (I mean, how do I know my code is
correct?).

As Paul suggests, spend a few days reading the FAQ,
and most of your questions will be answered.
Also look through the last 6 months or so of this
newsgroup.

A simulation compile will check syntax and running
a testbench can test your design and display waveforms.
Modelsim has an editor good enough to get started.

But then, since, as you know, the code for e.g. the D edge
triggered flip-flop which (normally, I think) serves as an IP in 80x86
is not THAT trivial, and also, since it's the first time I will write
in VHDL, I need to see it work (I don't have any experience at all, so
I can't do it "to touch").

Once you learn about clocked processes and the
ieee.numeric_std library you won't need
to reference D flops directly:

my_port <= my_value_v; -- dflop
my_reg_v := my_reg_v + 1; -- counter

Think about something simpler than a 80x86 cpu
for your first project.

Keep in mind that FPGAs are mainly used for tasks
that CPUs can't do, and that a CPU by itself
can't do anything.

What do you really want to do?


-- Mike Treseler

 

[A. Tomaszewski]

Paul Uiterlinden wrote:

First step:

http://www.vhdl.org/vi/comp.lang.vhdl/ ;-)

Paul.

Actually, the first thing I did before posting here was to look
through the FAQ (and browse for projects similar to mine). I think
it's great. There's hardly a FAQ in the groups I have followed which
is as well equipped as that of comp.lang.vdhl. But, AND PLEASE FORGIVE
ME THIS, I have always thought it's best to ask anyway. Will return to
the text again, however.

Thank you very much for writing.

Andrew
P.S. A reply of the form "Enter 'link', install, write code, compile,
watch, debug ..." would guarantee a kickstart even for as ignorant
person as me.

 

[A. Tomaszewski]

Mike Treseler wrote:

As Paul suggests, spend a few days reading the FAQ,
and most of your questions will be answered.

I see. Thank you.

Also look through the last 6 months or so of this newsgroup.

Right.

A simulation compile will check syntax and running
a testbench can test your design and display waveforms.
Modelsim has an editor good enough to get started.

Please, where do I obtain it? Is it freeware? (Actually, I will
inventionally buy a proper VHDL software, but need to learn something
before in order to ensure that the choice is really right for me -- I
guess there are many possibilities.)

Once you learn about clocked processes and the
ieee.numeric_std library you won't need
to reference D flops directly:

my_port <= my_value_v; -- dflop
my_reg_v := my_reg_v + 1; -- counter

Sorry to say this, but I don't expect to use the expert's
fuctions/levels of abstraction from the start. I understand the
abilities of the compiler in question are immense, but I also know one
needs to know very few to be able to describe a really complicate
circuitry.

Think about something simpler than a 80x86 cpu
for your first project.

I couldn't agree more, actually. Do you think the counter I mentioned
in my previous post would be a good idea? I mean, this would be the
direct way to building the processor, and yet a simple exercise which
will get me going in VHDL. Please, I just need someone to kindly GET
MY HANDS ON this project, I promise not to bother anyone later.

Keep in mind that FPGAs are mainly used for tasks
that CPUs can't do, and that a CPU by itself
can't do anything.

This is all new to me, I am afraid. The 8088 is on paper now, and I
don't have any experience with FPGAs, so I am unable to benefit from
your kind remarks.

What do you really want to do?

I need to build a processor circuitry with an instruction set
compatible with that of the 8088. Then, I need to simulate a NAND gate
structure for it. But, as you kindly suggest, perhaps I should start
with something simpler.

Please, where do I obtain software capable of simulating the D
counter?

-- Mike Treseler

Thank you very much for writing.

Tom