A variable index into the generate block

F

fpgabuilder

Guest
I have the following piece of code. My intention is to initialize a
register as shown. BFM3 is an interface instantiated as a buf. But
the previous part of the hierarchy is generated within a generate
statement. I am not sure why I am not able to use variables to
traverse the hierarchy. Modelsim complaints that I cannot use a
variable index into the generate block. To me it seems that once the
hierarchy is "generated" during elaboration... why should it matter if
we are using a variable to refer to the part of the hierarchy.

I would appreciate any insight.

integer i, x, y, z;
initial
begin
for (x=0;x<max_x;x+=1)
for(y=0;y<max_y;y+=1)
for(z=0;z<max_z;z+=1)
begin
tb.bfm1.bfm1_loop[x].bfm2.bfm2_loop[y].bfm3[z].init_reg =
i;
i = i+1;
end
end
 

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