32 bit multiplication

D

dhrumil

Guest
Can any one help me in writing the 32 bit unsigned multiplication in
verilog. I know that * can be used but it takes 32 cycles to complete
the calculation. Is there anyway to do in less clk cycles and also
less area during synthesis.

I also implemented the booth algorithm but it also takes 8 clk cycles
for 8 bit nos. I can use the while loop to make it synthesizable.

module boothmulti(ans,a,b);

input [7:0]a,b;
output [16:1]ans;

reg [16:1]ans;
reg [16:0]temp;
integer i;

always @(a or b)
begin
temp[0]=0;
temp[16:9]=4'b0;
temp[8:1]=a;

for(i=0;i<8;i=i+1)

begin
if (temp[1:0] == 2'b01)
begin
temp[16:9] = temp[16:9] +b;
temp = temp >> 1;
temp[16]=temp[15];
end
else if (temp[1:0]==2'b10)
begin
temp[16:9] = temp[16:9] - b;
temp = temp >> 1;
temp[16]=temp[15];
end
else if (temp[1:0]==2'b11)
begin
temp = temp >> 1;
temp[16]=temp[15];
end
else
begin
temp = temp >> 1;
temp[16]=temp[15];
end
end

ans[16:1]= temp[16:1];
end

endmodule

any help would be appreciated.

Thanks,
 
dhrumil,

If your target is an ASIC and * doesn't synthesize well (it's
combinatorial - it won't take 32 cycles unless you tell it to) then find
the multipliers in the ASIC library. If your target is an FPGA, the *
will synthesize the embedded multipliers to the appropriate size.

It's unusual these days that one needs to worry about the multiply
unless you're doing distributed arithmetic.

- John_H

dhrumil wrote:
Can any one help me in writing the 32 bit unsigned multiplication in
verilog. I know that * can be used but it takes 32 cycles to complete
the calculation. Is there anyway to do in less clk cycles and also
less area during synthesis.

I also implemented the booth algorithm but it also takes 8 clk cycles
for 8 bit nos. I can use the while loop to make it synthesizable.

module boothmulti(ans,a,b);

input [7:0]a,b;
output [16:1]ans;

reg [16:1]ans;
reg [16:0]temp;
integer i;

always @(a or b)
begin
temp[0]=0;
temp[16:9]=4'b0;
temp[8:1]=a;

for(i=0;i<8;i=i+1)

begin
if (temp[1:0] == 2'b01)
begin
temp[16:9] = temp[16:9] +b;
temp = temp >> 1;
temp[16]=temp[15];
end
else if (temp[1:0]==2'b10)
begin
temp[16:9] = temp[16:9] - b;
temp = temp >> 1;
temp[16]=temp[15];
end
else if (temp[1:0]==2'b11)
begin
temp = temp >> 1;
temp[16]=temp[15];
end
else
begin
temp = temp >> 1;
temp[16]=temp[15];
end
end

ans[16:1]= temp[16:1];
end

endmodule

any help would be appreciated.

Thanks,
 
On 6 May 2007 01:38:47 -0700, dhrumil <dhrumiljariwala@yahoo.com>
wrote:

Can any one help me in writing the 32 bit unsigned multiplication in
verilog. I know that * can be used but it takes 32 cycles to complete
the calculation.
I'm not sure where you got the idea that '*' takes 32 cycles. If you
write
always @(posedge clk)
c <= a*b:
you get a single cycle multiplier (regardless it meets timing or not)

If you can't meet timing & can afford the latency you can pipeline
this.

Is there anyway to do in less clk cycles and also
less area during synthesis.
Just use the '*' operator and see what you get.

I also implemented the booth algorithm but it also takes 8 clk cycles
for 8 bit nos. I can use the while loop to make it synthesizable.
with booth you should be getting the result in 1/N times the number of
bits depending on what booth radix you use. For standard booth it
should be 4 cycles for 8 bit numbers.
 
with booth you should be getting the result in 1/N times the number of
bits depending on what booth radix you use. For standard booth it
should be 4 cycles for 8 bit numbers.
I have used the for loop for 8 times and so it takes 8 clk cycles to
give the result. Can you give more comment on my code what is wrong? I
also understand that booth takes last 2 digits to make multiplication
faster but some how i am not able to get my code work in 1/n clk
cycles.

John thanks for the answer but the Prof. has said that no one use *
otherwise it would be easy for all and the mutliplication unit should
be a combinational only(no sequential Logic allowed). So, i need to
implement other methods.

Also, is there any way to write the recursive function? Because i also
want to implement the divide and conquer technique for multiplication.
Can anyone help me in the syntax by some ex. that how can I pass the 2
values in the function?
 

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