3/4 Punctured Convolution encoding

Hi
I have to perform punctured convolution encoding at 3/4 rate on Verilog. Can anyone provide me the source code to perform puncturing? I am able to perform convolution coding. Don't know how to implement puncturing on it.I have to maintain an output data rate of 100 MHz.

 

[Tim Wescott]

On Sat, 11 Jan 2014 23:31:10 -0800, eyecatcherdear wrote:

Hi I have to perform punctured convolution encoding at 3/4 rate on
Verilog. Can anyone provide me the source code to perform puncturing? I
am able to perform convolution coding. Don't know how to implement
puncturing on it.I have to maintain an output data rate of 100 MHz.

OK. It's not even close to April, so this isn't an April fool's joke.

What part of removing one of every four bits are you having trouble with?

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

 

On Wednesday, 15 January 2014 11:37:04 UTC+5, Tim Wescott wrote:
> On Sat, 11 Jan 2014 23:31:10 -0800, eyecatcherdear wrote: > Hi I have to perform punctured convolution encoding at 3/4 rate on > Verilog. Can anyone provide me the source code to perform puncturing? I > am able to perform convolution coding. Don't know how to implement > puncturing on it.I have to maintain an output data rate of 100 MHz. OK. It's not even close to April, so this isn't an April fool's joke. What part of removing one of every four bits are you having trouble with? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com

haha..well actually i have performed puncturing..sorry for the incomplete post.but that is at different output rate approach. I want to know if there is method in which i can maintain same rate for input and output without halting the data and just obtain a punctured code. Though my code works just fine. I have PLL clock generation core limitation in my design. So the problem arises.